This Streaming Multi-port SDRAM Memory Controller
IP Core integrates: a burst SDRAM memory controller core, a port arbitrator and intelligent look-ahead FIFO controller into one easy-to-use core. By supporting various memory device families in a single IP Core assures designers of a smooth low-risk migration path with changing technology.
The Streaming Multi-port SDRAM Memory Controller IP Core is targeted at applications requiring high-bandwidth/performance memory subsystems....view full
iW-SDIO Slave controller acts as a bridge core of
SDIO to UART or USB. It also facilitates the design of SDIO cards and reduces the development time. By using this IP core, customers no longer need to spend time on handling the SD bus protocol since such function is provided by the core....view full
iW-SD/SDIO/MMC Controller interfaces SD / MMC /
SDIO card to any processor with a generic interface. The interface towards the SD card is realized by the SD protocol implemented in the controller. The main blocks in the controller are CPU interface, command path state machine, command transmitter/ receiver, data path state machine, data transmit/receive and clock logic....view full
iW-ATA/ATAPI Controller core provides a simple
interface towards ATA/ATAPI devices. This core can be used to control ATA/ATAPI memory devices such as hard-disk drives, CD/DVD players and etc....view full
Depending on the application, DDR custom interface
can be used as a SDR or DDR SDRAM controller. DDR is used to interface any industry standard (SDR or DDR) memory device to a host model (an embedded processor or a system), which drives the core to access SDRAM.
The core is verified with SDR, DDR SDRAM devices on one side and a generic system and host interface on the other. The generic system interface is used to initiate write/read transfers, while the host interface is used to configure the core and memory operations....view full
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