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| You are here » Silicon-IPs » Analog-/-Mixed-Signal » Transceiver/IO |
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IP Title |
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MXL-SRDS-2500A |
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Ref |
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B18EDD0E63 |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL2500A is a full speed Gigabit transceiver
implemented using a digital CMOS technology. It can be used for high-speed bi-directional point-to-point data transmission. The transmitter accepts a 20bit parallel data at a reference clock frequency of 125 Mbps, serializes it, and outputs the serial data differentially at 20 times the input rate. The X20 frequency synthesizing PLL is fully integrated including the loop filter. The receiver accepts serial differential data at 2.5 Gbps, recovers the clock and data, de-serializes the data, and make the data available at the 20-bit wide bus....view full |
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IP Title |
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MXL-SRDS-4254A |
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Ref |
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0D199FA5A0 |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL4254A is a Quad Gigabit transceiver
implemented in digital CMOS technology. Each of the four channels supports data rate from 1 to 4.25 Gbps. It is compatible with router-backplane links, PCI Express, RapidIO, 10 Gbps Ethernet (XAUI), FibreChannel, SFI-5, SPI-5, Infiniband, and other communication applications. The frequency synthesizing PLL is fully integrated including the loop filter, and has a programmable multiplication factor (4, 5, 8, 10, 16, and 20). Each transmitter accepts an 8 or 10-bit parallel data, serializes it, and outputs the serial data differentially. Each receiver accepts serial differential data at up to 4.25 Gbps, recovers the clock and data, de-serializes the data, and make the data available at the parallel bus....view full |
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IP Title |
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MXL-TXRX-2000A |
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Ref |
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FB6263FC5F |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL2000A is a RapidIO transceiver implemented
in digital CMOS technology. It supports up to 2 Gbps. It is compatible with the RapidIO Physical layer specifications. Each driver accepts a CMOS level, single-ended input, and generates a RapidIO differential output. The receiver, on the other hand, accepts a RapidIO input signal at low voltage levels and converts it into a single-ended CMOS signal....view full |
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IP Title |
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MXL-TXRX-CEATA |
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Ref |
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28BC78A0E7 |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL-TXRX-CEATA is a CE-ATA 1.0 compliant
transceiver, implemented using digital CMOS technology. It supports both open-drain output and push-pull modes of operation. The transmitter has a high impedance mode. This core can be configured to operate as a transmitter or a receiver, and support a full power down mode. It also supports both the high-Voltage and dual voltage modes of operation....view full |
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IP Title |
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MXL-TXRX-DDR2 |
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Ref |
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E6B845F47F |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL-IO-DDR2 is a DDR2 compliant bidirectional
Transceiver, implemented using digital CMOS technology. It is designed to operate over 1.8V switching range independent of core power supply.
The VREF used at the single-ended receiver to ensures compatibilities between different transmitters and receivers.
Operations are guaranteed over the full Industrial temperature range (-40°C to 85°C)....view full |
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IP Title |
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MXL-TXRX-LVDS |
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Ref |
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B0E24FD9CA |
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Sections |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL-TXRX-LVDS is a LVDS transceiver
implemented in digital CMOS technology. It supports up to 666 Mbps. It is compatible with IEEE Std 1596, EIA-644-A, and OIF-SFI4 specifications. Each transmitter accepts a CMOS level, single-ended input, and generates an LVDS differential output. The receiver, on the other hand, accepts an LVDS input signal at low voltage levels and converts it into a single-ended CMOS signal....view full |
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IP Title |
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MXL-TXRX-MDDI |
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Ref |
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E0FF83A36A |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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This is an LVDS transceiver compliant with the
VESA Mobile Display Interface Client specifications. Wide common mode voltage receivers are used to meet the input common mode voltage required by the VESA MDDI standard. Low power implementation is used for the Hibernation Receiver to minimize power dissipation in the Hibernation mode.
The termination is external and on the Client side only, resulting in lower total power dissipation compared to regular LVDS transceiver....view full |
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IP Title |
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MXL-TXRX-MIPI |
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Ref |
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2C61D34FC4 |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL-TXRX-MIPI is a high-frequency low-power,
low-cost, source-synchronous, physical layer compliant with the MIPI Alliance Standard for D-PHY. Although it is primarily used for connecting cameras and display devices to a cost processor, it can also be used for many other portable applications. It is used in a master-slave configuration. High-Speed signals have a
low voltage swing, while Low-Power signals have large swing. High-Speed functions are used for High-Speed Data traffic while low power functions are mostly used for control....view full |
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IP Title |
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MXL-TXRX-PATA |
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Ref |
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B53CFD2298 |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL-TXRX-PATA is Parallel-ATA transceiver
designed for parallel hard disk applications. It supports UDMA mode 5 with maximum speed of 100Mb/s. The transmitter and the received are enabled and disabled independently to allow bidirectional operations and tri-state mode. The mode pin selects the internal or external current source. The MXLTXRX-PATA can either use internally generated current source or external current source which can be provided by the companion MXL-BGR....view full |
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IP Title |
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MXL-TXRX-PCIX |
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Ref |
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64FE30C359 |
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Silicon IPs > Analog / Mixed-Signal
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Summary |
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The MXL-TXRX-PCI-X is a PCI-X 1.0 compliant
transceiver, implemented using digital CMOS technology. It supports both open-drain output and push-pull modes of operation. This core can be configured to operated as a transmitter or a receiver...view full |
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